Chapter 10 - DRAM Memory System Organization

Abstract

Multiple DRAM devices are interconnected together to form a single memory system that is managed by a single memory controller. This chapter describes the basic terminologies and building blocks of DRAM memory systems. It examines the construction, organization, and operation of multiple DRAM devices in a larger memory system. It covers the terminologies and topology, as well as the organization of various types of memory modules. The organization of multiple DRAM devices into a memory system can impact the performance of the memory system in terms of system storage capacity, operating data rates, access latency, and sustainable bandwidth characteristics. It is therefore of great importance that the organization of multiple DRAM devices into larger memory systems be examined in detail. Modern DRAM memory systems often support large varieties of memory modules to give end-users the flexibility of selecting and configuring the desired memory capacity. To achieve high signaling data rates, direct RDRAM and XDR DRAM memory systems rely on the re-engineering of the interconnection interface between the memory controller and the DRAM devices. In these high data rate DRAM devices, far more circuitry is placed on the DRAM devices in terms of pin interface impedance control and signal drive current strength.