Abstract
Junctionless transistors (JLTs) have promising strengths such as extremely simple structures without p-n junctions, better reliability, and low flicker noise, for overcoming scaling challenges for advanced sub-5-nm nodes. In this article, channel-width-dependent operation in the partially depleted regime of tri-gate JLTs was investigated in comparison to conduction in conventional inversion-mode (IM) transistors. A large difference in transconductance (gₘ) against gate-to-channel capacitance (C <formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex>$_{gc}$</tex> </formula> ) and the reduced amplitude of the first peak on dgₘ/dV <formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex>$_{g}$</tex> </formula> were identified under the partially depleted regime in JLTs, due to a severe transverse E-field near-threshold voltage (V <formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex>$_{th}$</tex> </formula> ). However, the impact of E-field was weakened as decreasing channel width of JLTs. These works provide key information for a better understanding of the channel-width-dependent performance of JLTs and for implementing practical applications with them.
Submitted Version (
Free)
Published Version
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a call