Challenges, developments and applications of silicon deep reactive ion etching

Abstract

High etching speed, good uniformity and profile control, high aspect ratio capabilities and reliable notching suppression at dielectric interfaces are key requirements in the industrial application of silicon DRIE processing. An optimized hardware for balanced RF drive at high power levels (3 kW) of the inductive plasma source in combination with spatial ion discrimination and collimation yields etch-rates in excess of 10 μm/min with excellent uniformity of profile and rate distribution (±1.5% over 6 in. wafers, 20% open area). Etching of high aspect-ratio trenches and reduction of CD loss is achieved by parameter adaptation strategies, starting from a passivation-heavy recipe and reducing the passivation load steadily during process progress. Different substrate pulsed-biasing schemes are compared with respect to their potential to suppression of notching at the dielectric interface and resulting side-effects on profile and process window.