Abstract

The vertical Gallium Nitride-on-Silicon (GaN-on-Si) trench metal-oxide-semiconductor field effect transistor (MOSFET) is a promising architecture for the development of efficient GaN-based power transistors on foreign substrates for power conversion applications. This work presents an overview of recent case studies, to discuss the most relevant challenges related to the development of reliable vertical GaN-on-Si trench MOSFETs. The focus lies on strategies to identify and tackle the most relevant reliability issues. First, we describe leakage and doping considerations, which must be considered to design vertical GaN-on-Si stacks with high breakdown voltage. Next, we describe gate design techniques to improve breakdown performance, through variation of dielectric composition coupled with optimization of the trench structure. Finally, we describe how to identify and compare trapping effects with the help of pulsed techniques, combined with light-assisted de-trapping analyses, in order to assess the dynamic performance of the devices.

Highlights

  • IntroductionPublisher’s Note: MDPI stays neutral with regard to jurisdictional claims in published maps and institutional affiliations

  • We demonstrate the advantages of employing a bilayer insulator composition in quasi-vertical metal-oxide-semiconductor field effect transistor (MOSFET) through DC and pulsed measurements, and technology computer-aided design (TCAD)

  • We have summarized some of the most relevant challenges for the development of reliable GaN-on-Si vertical trench MOSFETs, for application in power electronics

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Summary

Introduction

Publisher’s Note: MDPI stays neutral with regard to jurisdictional claims in published maps and institutional affiliations. GaN (BFOM = 3175 [9]) is superior to SiC (BFOM = 840 [9]) in most material properties, SiC has better thermal conductivity and is generally considered to be more relevant to the high voltage (>1200 V) application domain, while the commercial marketability of GaN is usually assumed to be in the low to mid voltage ≤650 V (power capability ≈ kW) domain [1,9,10] This is primarily because of the current and voltage limitations [1,9,11] of the lateral configuration initially adopted for design of GaN power transistors. We discuss the factors influencing the leakage current and the breakdown voltage of vertical GaN-on-Si stack, designed for vertical trench-MOSFETs. The growth of thick, mostly insulating GaN drift layers on Si was made possible during the last years thanks to the intense research on lateral power GaN devices; the main goal has been to improve the OFF-state blocking capability. The reverse breakdown voltage was measured to be 170 V on these specific structures, having a drift layer thickness equal to 750 nm [45,55]

Leakage Modeling
Simulation of Doping Constraints in Diode Breakdown
OFF-State and ON-State–Optimization of the M-O-S Stack in Quasi-Vertical
Optimising Dielectric Composition
Optimising Trench Fabrication
ON-State-Light Assisted Analysis of Trapping Mechanisms in Quasi-Vertical
Findings
Conclusions
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