Cell technology directions for advanced MPUs and other memory-embedded logic devices

Abstract

In this paper, a guideline for optimum embedded memory structures for advanced MPUs and other memory-embedded logic devices is proposed. It is concluded that introduction of full CMOS cells is inevitable for future SRAMs operated under reduced power supply voltage conditions. Therefore, MPUs will continue to use full CMOS cells maintaining excellent process and transistor design compatibility with SRAMs. On the other hand, some advanced logic devices will use DRAM cells, since they require higher density rather than higher performance or better process compatibility. >