Cascaded Common Nodal Point Multi-level Inverter Topology

Abstract

Recent trends in the multi-level inverter (MLI) technology demand reduced number of switches, driver circuits, isolated DC sources, peak inverse voltage (PIV), appreciable number of voltage level, and lower total harmonic distortion. This paper presents an improved cascaded MLI configuration. Each module comprises ten switches, two isolated DC sources, and two capacitors; it can generate a maximum of 9-level output voltage waveform. Optimized switching sequence is developed that ensures minimum switching transitions and is implemented through single-carrier pulse width modulation for the control of the proposed topology. The classical cascaded H-bridge inverter and some recently developed MLI configurations were compared with the proposed inverter circuit. Results show that the proposed inverter configuration generates high number of output voltage levels with reduced number of power switches and PIV. It also has a lower per-unit power loss profile. Unit capacitor voltage balancing scheme is developed, which ensures proper control of the unit step voltage level in each of the cascaded modules, at extreme loading condition. For two cascaded inverter modules, simulation and experimental verifications are carried out on the proposed inverter for an R–L load. Simulation results of the output voltage waveforms and its harmonic spectrum are in conformity with experimental results.