Carry based approximate full adder for low power approximate computing

Abstract

Approximate computing can reduce the design complication with an increase in performance and power efficiency for error resilient applications. In most multimedia applications, we can gather valuable information from slightly erroneous outputs. Therefore, we do not need to produce accurate outputs. This brief deals with a new gate level logic modification approach for approximation of full adder, to take advantage of the relaxation of numerical exactness. The sum term of the conventional full adder is altered to reduce an area complexity by proposing carry based approximation adder(CBAA) to avoid critical XOR operation in conventional one. We demonstrate this concept by proposing various imprecise approximate type full adders with reduced complexity at the gate level, and utilize them to design approximate multi-bit adders. Simulation results indicate up to 98% power savings using the proposed approximate adders, when compared o existing implementations using accurate adders.