Abstract
Low-dropout (LDO) regulators have become integral parts of on-chip power management schemes. This paper presents a capacitor-less LDO regulator, which incorporates a Class AB input stage cross-coupled differential amplifier to improve slew-rate and a passive low-pass RC filter to improve the power supply rejection ratio (PSRR). The high DC gain of the class AB input operational transconductance amplifier (OTA) improves the PSRR of the LDO to about 45 dB @ 100 kHz. In addition, a PMOS pass transistor is cascaded with an NMOS device to improve the PSRR and the concept of miller capacitance is used to stabilize the LDO with small load capacitor of 10pF. From the initial simulation results, it has been observed that the proposed LDO can operate from a supply voltage of 3.3–3.5 V with a minimum dropout voltage of 0.5 V at a maximum 50-mA load and quiescent current of 50 μA.
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