Abstract

Capacitive pressure transducers, integrated with active electronic circuits on the chip, are presented. An impedance bridge-type circuit that measures the change of capacitance with reference to a fixed capacitor is used. A single cavity contains the pressure sensing and reference capacitors. The difference between the capacitors, due to applied pressure, is measured by a bridge powered by a high-frequency oscillator. The output is a d.c. voltage representing the pressure. This output is fed through a source follower to provide low output impedance and required load driving capability. In the bipolar approach, the output voltage is limited to the range ± 0.2 or 0.3 V, independent of the high-frequency driving voltage amplitude. In this limited range, zero offset voltage becomes critical. With standard device fabrication process tolerance, on-chip offset trimming is needed. A design of the trimming circuit is presented. In the CMOS approach, the signal output can be extended to 60% of the H.F. voltage source. However, fabricatin processes and yield are major problems. The results of initial runs and laboratory valuations are presented. The capacitive pressure transducer has the dimensions 3.75 × 2.25 × 0.4 mm; a pressure sensitivity of 56 μV/Torr V supply at a range of 0 to 300 mmHg. It uses a ±5 V , 5 mA d.c. supply.

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