CAM puzzle: A power model and function-based circuit segment method of Content Addressable Memory

Abstract

Content Addressable Memory (CAM) is a data storage device, utilizing the Static Random Access Memory (SRAM) cell. CAMs are very popular especially implemented in network routers for IP address lookup, packet forwarding and packet classifications. Up to now, there are many types of CAM to conform to these different implementations. For the purpose to estimate the efficiency and power distribution of all types of CAM, doing preliminary simulation is needed before doing concrete circuit layout. Therefore, a speedy and accurate power analysis method is necessary. Besides, the simulation time of nowadays circuit simulation tool like HSPICE is considerable, especially for high frequency data storage circuits like CAMs. This work established a brand new power model of CAM which is called CAM Puzzle (CAMP), combining the petty models which are extracted from SPICE simulation, simplified into easily analytical power expressions in order to analyse the conventional CAM and pre-computation based content addressable memory (PB-CAM). In addition, this work also estimates the power consumption of CAM peripheral circuits such as address decoder circuit and data I/O. Using CAMP, the power consumption of complete CAM architecture can be estimated with 82% model accuracy and 94% system accuracy compared to SPICE simulation in 0.18µm process.