Abstract

A digital inverter based on CMOS design is implemented using the bulk-driven (BD) technique for both floating gate (FG) and quasi floating gate (QFG) MOS. It has all the advantages of CMOS design, significantly less up to zero threshold voltage requirements in the signal path. Besides, it offers the ability to apply multiple-inputs on the gate of a single transistor. The BD and FG techniques are suitable for low power, low-voltage design. Even though these non-conventional methods offer good performance and design simplicity, they still suffer from several drawbacks such as threshold voltage, lower transconductance and transient frequency, which have been overcome by using the combination of BD and FG techniques. In this paper, we have designed a bulk-driven CMOS inverter and compared its performance with bulk-driven floating gate (BDFG) and bulk-driven quasi floating gate (BDQFG) MOSFET versions. The comparisons revealed that bulk-driven quasi floating-gate (BDQFG) MOSFET based inverter circuits consumes less power (3.57 n W) with the lowest propagation delay (18.32 ps) in comparison with corresponding circuit design with floating-gate MOSFET(3.72 nW, 32.96 ps), quasi floating-gate MOSFET (13.2 nW, 22.99 ps), and bulk-driven floating-gate MOSFET (7.17 nW, 26.63 ps). Further, the presented inverters configurations have been used to implement ring oscillators. With a supply rail of 1 V and a PSpice simulation utilizing the level 7 parameter in 0.13 μn CMOS technology, the performance of the suggested circuits has been confirmed.

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