Bulk CMOS Low Noise Amplifier With Two Stage HPF Noise Matching Structure

Abstract

In this study, a two-stage low-noise amplifier (LNA) was developed in which the noise-matching network of a high-pass filter (HPF) structure is applied to both stages. As the HPF noise matching network is used in both stages, the noise figure of the proposed LNA can be reduced compared to that of the conventional LNA. In particular, the noise figure is improved in the high-frequency region. To verify this development, a two-stage common-source LNA was implemented using 0.18-lm bulk complementary metal oxide semiconductor technology. The fabricated LNA achieved an average noise figure of 2.6 dB (minimum noise figure of 2.23 dB at 3.95 GHz) and a peak gain of 14.19 dB. In addition, the LNA has an input 1-dB compression point (IP1dB) of.12 dBm and a third-order input intercept point (IIP3) of +2.0 dBm at 3.5 GHz, consumes 16 mA with a 0.9 V supply, and has an area of 0.7 mm2.