Abstract

This letter reports the shallow-trench-isolation (STI)-induced mechanical-stress-related breakdown behavior of the 40-nm PD-SOI NMOS device. As verified by the experimentally measured data and the 2D simulation results, breakdown occurs at a higher drain voltage for the device with a smaller S/D length of 0.17 mum due to the weaker function of the parasitic bipolar device, which is offset by the stronger impact ionization in the post-pinchoff region coming from the bandgap narrowing generated by the STI-induced mechanical stress.

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