Abstract
Silicon based metal-semiconductor-metal (MSM) photodetectors have faster photogeneration and carrier collection across the metal-semiconductor Schottky contacts, and CMOS integratibility compared to conventional p-n junction photodetectors. However, its operations are limited by low photogeneration, inefficient carrier-separation, and low mobility. Here, we show a simple and highly effective approach for boosting Si MSM photodetector efficiency by uniformly decorating semiconducting CdSe quantum dots on Si channel (Si-QD). Significantly higher photocurrent on/off ratio was achieved up to over 500 compared to conventional Si MSM photodetector (on/off ratio ~5) by increasing photogeneration and improving carrier separation. Furthermore, a substrate-biasing technique invoked wide range of tunable photocurrent on/off ratio in Si-QD photodetector (ranging from 2.7 to 562) by applying suitable combinations of source-drain and substrate biasing conditions. Strong photogeneration and carrier separation were achieved by employing Stark effect into the Si-QD hybrid system. These results highlight a promising method for enhancing Si MSM photodetector efficiency more than 100 times and simultaneously compatible with current silicon technologies.
Highlights
Supplementary enhancement in photogenerated charge carrier separation and improved Si-quantum dot (QD) device performance
Uniform dispersion of CdSe QDs in toluene solution was spin-coated on top of the Si MSM device in order to achieve uniform QD distribution
The pristine QDs dispersed in toluene resulted in sharp absorption in the wavelength ranging from near UV to 460 nm
Summary
Supplementary enhancement in photogenerated charge carrier separation and improved Si-QD device performance. The PL transition peaks were compared with varied source-drain voltages (VDS from +5 V to −5 V) in order to investigate the electric field induced photoactivity in Si-QD MSM device structure. The photocurrent on/off ratio was enhanced up to 265 in Si-QD device under +2 V substrate and VDS biasing condition (see Fig. 3(d)).
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