Blocks: Redesigning Coarse Grained Reconfigurable Architectures for Energy Efficiency

Abstract

Demand for coarse grain reconfigurable architectures has significantly increased as architectures need to be both energy efficient and flexible. However, most CGRAs are optimized for performance instead of energy efficiency. In this work Blocks is presented. Blocks uses two separate circuit-switched networks, one for control and one for the data-path. The unique structure of these networks enables run-time construction of energy-efficient application-specific VLIW-SIMD processors. Energy efficiency is demonstrated by comparing Blocks to a traditional CGRA on 40nm layout. Results show an energy overhead reduction between 46% and 76% and total energy reduction between 9% and 29%, depending on the benchmark. Demonstrating that the cost of flexibility can be lower than might be expected.