Bit-stream implementation of a phase-locked loop

Abstract

Bit-stream is a new technique for controlling power electronics applications by interconnecting appropriate control elements inside an field programmable gate array (FPGA). This paper presents a bit-stream-based phase locked loop (PLL), which is essential for the implementation of sophisticated power electronics control systems using bit-streams. The proposed PLL consists of a phase detector, loop filter and numerically controlled oscillator, each of which is designed using standard analogue methods and converted to equivalent bit-stream elements. The bit-stream-based PLL is modelled using Matlab/Simulink and ModelSim, and results show that the PLL successfully locks onto a 50 Hz three-phase voltage source. Experimental results of a prototype, constructed using an Altera Cyclone II FPGA and controlled using a bit-stream-based PLL, are presented and compared to a similar, microprocessor-based, PLL to demonstrate that the bit-stream-based PLL successfully locks onto the line voltage waveform. The practical viability of the proposed bit-stream PLL is investigated using a prototype three-phase, 3 kW, controlled rectifier. The experimental implementation of the PLL requires approximately 350 logic elements.