Bitstream decoding and SEU-induced failure analysis in SRAM-based FPGAs

Abstract

Reconfigurable SRAM-based FPGAs are highly susceptible to radiation induced single-event upsets (SEUs) in space applications. The bit flip in FPGAs configuration memory may alter user circuit permanently without proper bitstream reparation, which is a completely different phenomenon from upsets in traditional memory devices. It is important to find the relationship between a programmable resource and corresponding control bit in order to understand the impact of this effect. In this paper, a method is proposed to decode the bitstream of FPGAs from Xilinx Corporation, and then an analysis program is developed to parse the netlist of a specific design to get the configuration state of occupied programmable logic and routings. After that, an SEU propagation rule is established according to the resource type to identify critical logic nodes and paths, which could destroy the circuit topological structure. The decoded relationship is stored in a database. The database is queried to get the sensitive bits of a specific design. The result can be used to represent the vulnerability of the system and predict the on orbit system failure rate. The analysis tool was validated through fault injection and accelerator irradiation experiment.