Bit error probabilities in high temperature superconductor logic

Abstract

We present error rate simulations for a single flux quantum logic circuit which include statistical variations in the circuit parameters. We find that the fabrication yield, junction critical margins, and bit error probabilities of the nominal circuit can give a false impression of the performance of practical circuits. For our study circuit, the toggle flipflop, we find that, although the standard figures of merit may vary only marginally with design rules, the average error rate can differ by a factor of 104. Furthermore, for a state-of-the-art technology, the error rates of different realizations of the same design actually span 10 orders of magnitude. These results highlight the inadequacy of current figures of merit to gauge the performance of high temperature superconductor designs.