Bipolar transistor epilayer design using the MAIDS mixed-level simulator

Abstract

In this paper, we address the epilayer design of the bipolar transistor using the one-dimensional (1-D) mixed-level simulator MAIDS (microwave active integral device simulator). MAIDS facilitates simulation of the electrical behavior of bipolar (hetero) junction transistors with various doping profiles and under different signal conditions in a realistic circuit environment. MAIDS as implemented within Hewlett Packard's microwave design system is a useful and promising tool in the development of bipolar transistors for large-signal conditions. Using MAIDS, we have identified the dominant bipolar transistor distortion sources with respect to the biasing conditions. Simulation results are compared with small- and large-signal measurements for the BFQ135 transistor, which has been developed for cable television (CATV) applications. By analyzing the measured and simulated data, we have developed an optimum epilayer design map for third-order intermodulation distortion that has proven to be particularly useful in the epilayer dimensioning of transistors for CATV applications.