Small geometry depleted base bipolar transistors (BSIT)—VLSI devices?

Abstract

An essential characteristic of devices which are viable candidates for VLSI circuits is that they must have electrical characteristics which can tolerate process variations. Conventional bipolar junction transistors (BJT) are well known to be limited by punchthrough when vertical basewidths axe decreased; these devices are, however, relatively tolerant of linewidth variations. The depleted base bipolar transistor represents a limiting case when the metallurgical basewidth is allowed to shrink to zero. Such devices, also called bipolar static induction transistors (BSIT), have been proposed as candidates for VLSI logic circuits. This paper describes the basic device physics of depleted base transistors and presents experimental verification of the theoretical modeling. The two essential conclusions that are drawn are that such devices can only achieve performance (in terms of transconductance) comparable to BJT's when an electrical p-type base exists (n-p-n device) and secondly, that BSIT's have characteristics which are extremely sensitive to process variations (linewidths, junction depths, and doping profiles). As a consequence, we conclude that while pure bipolar transistors may play an important role in VLSI circuits, depleted base structures such as the BSlT, are unlikely candidates for such applications.