Abstract
In this paper, a pseudo-custom approach to bipolar VLSI chip design is presented, and a hierarchical structure of logic macros assembled from building blocks is described. A strategy of placing the logic macros along with algorithmically designed PLA structures and ROS with a placement aid, and of wiring the placement with an automatic wiring program, is discussed. The paper also focuses on the implementation of this strategy in terms of technology, chip structure, and chip design methodology. In addition, chip statistics are presented and their implications are discussed.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
