Bias-dependent timing jitter of 1-GHz sinusoidally gated InGaAs/InP avalanche photodiode**Project supported by the National Natural Science Foundation of China (Grant Nos. 11275024, 61274024, and 61474123), the Youth Innovation Promotion Association, China (Grant No. 2013105), and the Ministry of Science and Technology of China (Grant Nos. 2013YQ030595-3 and 2011AA120101).

Abstract

We characterized the dependence of the timing jitter of an InGaAs/InP single-photon avalanche diode on the excess bias voltage (Vex) when operated in 1-GHz sinusoidally gated mode. The single-photon avalanche diode was cooled to −30 degrees Celsius. When the Vex is too low (0.2 V–0.8 V) or too high (3 V–4.2 V), the timing jitter is increased with the Vex, particularly at high Vex. While at middle Vex (1 V–2.8 V), the timing jitter is reduced. Measurements of the timing jitter of the same avalanche diode with pulsed gating show that this effect is likely related to the increase of both the amplitude of the Vex and the width of the gate-on time. For the 1-GHz sinusoidally gated detector, the best jitter of 93 ps is achieved with a photon detection efficiency of 21.4% and a dark count rate of ∼2.08×10−5 per gate at the Vex of 2.8 V. To evaluate the whole performance of the detector, we calculated the noise equivalent power (NEP) and the afterpulse probability (Pap). It is found that both NEP and Pap increase quickly when the Vex is above 2.8 V. At 2.8-V Vex, the NEP and Pap are ∼2.06×10−16 W/Hz1/2 and 7.11%, respectively. Therefore, the detector should be operated with Vex of 2.8 V to exploit the fast time response, low NEP and low Pap.