Abstract

The scaling of CMOS devices into the nanometer regime has required the introduction of new materials in field effect transistor fabrication. Foremost of these is the introduction or new gate dielectrics to replace the ultra-thin SiO2 films traditionally used. It has been found that these materials, such as ZrO2, HfO2 and Al 2O3, reduce gate leakage currents by 2–5 orders of magnitude. Unfortunately these new high-κ materials have also resulted in substantial electron and hole mobility reduction. However, with the introduction of strained silicon, in which mobilities have been recovered to the extent that even with the high-κ gate dielectrics improvements have been noted approaching 60%. Further increases in electron and more importantly hole mobilities have been discovered with the use of silicon substrates of either (110) or (111) orientations. However, the electron mobility had a significant decrease with the same substrates. Finally the introduction of metal gates has allowed scaling to continue by eliminating the capacitance of the poly-Si gate. Even though the requirements for such metal gates are quite restrictive, a number of candidates have been found. Such metal systems that might be used include particular Ru-Ta alloys gates for both nFETs and pFETs can be fabricated and perform as desired. Similarly, the use of a variety of nitrogen concentrations in TiN and TaN yields a range of acceptable work functions which might be applicable to either or both FET types. The introduction of these materials increases device performance but it is their integration into CMOS processes that will determine their utility. (© 2004 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

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