Behavior of Nano-N-Channel Metal–Oxide–Semiconductor Off-State Leakage Currents

Abstract

In this paper, leakage current behavior is discussed, particularly in the off state of nano-N-channel metal–oxide–semiconductor (NMOS) devices. In our experimental results, we observed a special phenomenon in the off-state I–V (off-current components vs VD) curves. We propose a new model named the gate current induced punch-through (GCIP) model, which is discussed in detail to explain this phenomenon. As the complementary metal–oxide–semiconductor (CMOS) device dimensions are being scaled down to the nano-scale level, the gate oxide thickness is becoming significantly thinner than in any other previously produced devices. The use of ultrathin gate oxide induces an off-state gate leakage current which is not neglect in the gate terminal, and possibly causes the generation of electron-hole pairs in the CMOS substrate. The avalanche effect on electron-hole pair generation finally causes the device punch-through. This punch-through phenomenon is induced by the gate tunneling current, and therefore we named it the GCIP model.