Abstract
As the MOSFET dimensions are reduced further in the sub 50nm regime; ballistic transport would become a very important factor in governing the current characteristics. The maximum current a MOSFET can physically carry and the fastest it can operate is governed by the ballistic transport of the carriers in the channel. Therefore, we should fully understand this phenomenon, by the use of physical models, device simulations and if possible actual fabrication of devices. Also, the present gap between the results predicted by analytical models and rigorous simulations has to be bridged. To realize a device with 100% ballistic transport, efforts have to be directed to address the issues that impede the ballistic transport, like reducing the channel scattering, improving the Si-SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> interface and use of double gate structures.
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