Backside Lithography in 3D Device

Abstract

The requirements for some special devices such as MEMS, image sensors and power devices are increased rapidly. Their structures and fabrication methods are different to normal CMOS devices. At the same time, the wafer thicknesses for these special devices are largely reduced to achieve better energy loss and cooling performance. In order to formulate the complex 3D structures on ultra-thin silicon wafers, pattern technologies with good alignment between front side and backside are needed. How to handle the ultra-thin wafer is also a big challenge. In this paper, we will demostrate how to transfer the layout design to both wafer frontside and backside with a good alignment on ultra-thin wafers. A kind of RC-IGBT device formulation is used as an example. Two approaches are proposed. One is aligned by intrared light and the other one is aligned by visible light. A method to handle ultra-thin wafers is also discussed.