Automatic inspection of SET sensitivity in analog cells

Abstract

In this paper, a software simulation tool for automation of electrical sensitivity analysis of Single Event Effects (SEE) is presented. In particular, the proposed tool can be used to check the error sensitivity of analog designs with large number of transistors. The proposed methodology allows a rapid location of critical nodes in order to ensure a proper radiation-hardened performance under the influence of current injected Single Event Transient Effects (SET). As a case study, several operational amplifier architectures have been designed and simulated in a 130 nm CMOS technology, validating the performance of the implemented analysis method.