Abstract

A new pre-placement phase of integrated circuits (IC) analog-mixed-signal (AMS) physical design flow, introduced in this paper, automatically sorts electrical devices used in planar IC technologies according to their topological, structural and electrical properties. The presented design phase replaces human labour and allows to save design time and prevent human mistakes. Software implementation of the proposed method works with virtual objects of layout instances which are moved only once at the end of the script when creating the final pre-placement matrix. Algorithm complexity is decreased by a new way of virtual objects matrix indexing. The automatic pre-placement phase has been used during design of AMS circuits in 160 nm BCD8sP and SOIBCD8S technologies from STMicroelectronics and has been faster in the range of 3164 to 20099 times compared to manual sorting. The estimation of ratio between manual sorting time and automatic pre-placement time shows a growing time saving with increasing circuit complexity compared to standard layout flow. The introduced enhanced layout flow is able to prevent a creation of hardly detectable errors occurring at the beginning of AMS physical design, especially the wrong bulk connection errors of semiconductor devices. The automatic pre-placement phase saves hours of reworks and speeds up the entire design process.

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