Automated array assembly. Annual report

Abstract

The goal of the ERDA/JPL LSSA program of $0.50/W selling price for array modules in 1986 turns out to have been remarkably appropriate. An extensive and detailed analysis of technologies which could be related to array module manufacturing was completed and a minimum manufacturing cost in a highly automated line of $0.30/W was found assuming the silicon is free. The panels are of a double glass construction and are based on round wafers. Screen printed silver has been used as the metallization with a spray-coated AR layer. The least expensive junction formation technology appears to be ion implantation; however, several other technologies also may be used with very little cost penalty as described. Based on the required investment, a profit of $0.05/W appears reasonable. If silicon wafers are available at a price of $20 to 40/M/sup 2/, a selling price for these array modules of $0.50 to 0.66/W is projected. An analysis of the impact of factory size has been made. For a production level of 500 MW/yr, the price above is derived. For comparison, a factory processing 50 MW/yr using the same technology would sell modules for $0.54/W to $0.70/W. An analysis of the impact of wafer size indicates that with traditional metallization and panel designs there is no advantage in increasing wafer size from 3 in. to 5 in., and, in fact, there is some penalty (10% in $/W) due to increasedmetallization costs and reduced system performance. There is a premium placed on high efficiency due to its impact, not only on array module cost, but on system cost. For the near term goals of this program, wafers cut from single-crystal material seem the most likely sheet configuration.