Attributed Graph Transformation for Generating Synthetic Benchmarks for Hardware Security

Abstract

EDA methods in general and hardware security applications in particular require careful benchmarking covering nominal and corner cases of various design parameters. Attributed graph grammars have been used for generating interesting and constraint-satisfying structures in various domains of design. This paper shows how attributed graph transformation systems can be effectively adapted to automatically generate synthetic circuit structures that meet arbitrary constraints on various design parameters and how the method is flexible and scalable. We discuss the method in detail and demonstrate its utility for an example hardware security application, the sequential satisfiability attack.