Atomistic simulations of the thinning process of tantalum/copper heterostructure in wafer containing through silicon via

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Through silicon via (TSV) interconnect structure plays an essential role in high-density 3-D integration. The tantalum (Ta)/copper (Cu) heterointerface is one of the significant interfaces in the wafer containing TSV. Molecular dynamics simulations are utilized to study the interface evolution and thinning mechanism of Ta/Cu heterostructure at different grinding depths during the thinning process. It is found that atomic diffusion, amorphization, phase transition, and micro-defects are typical characteristics of interfacial evolution, which become more pronounced at deeper grinding depths. The extrusion of the hard Ta layer on the soft Cu layer leads to an early appearance of interface defects, including dislocations and stacking faults. It is revealed that the large lattice mismatch of the constituent layers and obstruction of the heterointerface result in obvious stress concentration. The reduced tangential and normal forces at the interface are ascribed to atomic structure evolution and intrinsic properties of the heterostructure. Additionally, the heterointerface can hinder heat conduction between the Ta and Cu layers. These findings can provide valuable guidance for the manufacture of the wafer containing TSV.