Abstract
The paper presents atomic layer deposition (ALD) processes and process integration for the deposition of insulating liners, copper diffusion barriers, and seed layers for direct copper plating in high aspect ratio (>20:1) through silicon vias. A TaN-based copper diffusion barrier was deployed on an aluminum oxide insulating liner. The latter has the potential to act also as a dielectric barrier against copper diffusion according to BTS and TVS measurements. Furthermore, ruthenium ALD films applied as seed layers for direct copper plating were deposited with an intermediate annealing step to improve film adhesion and ensure the deposition of thick films without any delamination. The step coverage of the presented ALD processes was confirmed by SEM measurements on cross-sections of coated TSV structures. Finally a subsequent electrochemical deposition (ECD) of copper was conducted revealing the satisfying functionality of the Ru seed layer.
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