Abstract

Wafer bonding is the dedicated joining of two semiconductor wafer surfaces without the use of adhesives. Specific applications include silicon-oninsulator (SOI), sensors and actuators, and threedimensional integrated microstructures [1-5]. Although a complete theory has not been presented to explain the bonding process, it is generally accepted that the attractive interfacial force between the two surfaces that are separated only by atomic distances is responsible for the initial bonding. These attractive interracial forces are believed to be either electrostatic or chemical in nature. When the two wafers are contacted a relatively weak adhesive force is developed between the surfaces. This initial bond can be strengthened by additional processing such as thermal annealing. The sum of the attractive chemical or ionic interfacial forces balance against the mechanical forces exerted by surface contaminants, roughness, waviness, and wafer bow to determine if an initial bond will form [6]. It is obvious, therefore, that surface-related defects such as particulate contamination, surface roughness, and surface waviness must be minimized and controlled in order to optimize the initial contact for successful bonding to take place. Due to this fact the development of wafer bonding has been highly focused on smooth films such as thermal oxides and bare silicon surfaces. Chemically vapour deposited (CVD) oxides are widely used for the development of integrated circuit (IC) technologies. These CVD oxides may be good candidates for low-temperature wafer bonded surfaces. Structures that do not have surfaces that naturally bond may still be bonded by using deposited films such as oxides as an intermediate layer. P r e v i o u s l y , Si3N 4 and TiN deposited films have been found to form low-temperature bonds [7, 8]. Two other possibilities for low-temperature bondable deposited films are borophosphosilicate glass (BPSG), and low pressure chemically vapour deposited (LPCVD) undoped SiO2. BPSG is used extensively in microelectronics device fabrication as an interlayer dielectric film due to its excellent planarization, gettering and flow properties [9]; LPCVD SiO2 is used in applications where there are stringent step coverage and gap-filling requirements [10]. The successful and reliable bonding of these films would be a very important milestone in the realization of novel structures such as three-dimensional ICs

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