ATM switching network with route-associated buffers and its traffic-handling characteristics

Abstract

Asynchronous transfer mode (ATM) switching is studied widely as the switching method in the broadband ISDN and numerous switching methods have been proposed. In most of those methods, the deterioration of the throughput due to the internal collision of the cells is prevented in the switching network by a complex control protocol or by increasing the internal speed. In the highspeed broadband switching system such as ATM, however, it is desirable for the system that the structure and the control be simple, the internal speed not be increased, and the highly efficient switching network be realized with a nonblocking property. This paper attempts to satisfy the forementioned requirements and proposes the route-associated buffer system in which the buffers are provided corresponding to the input and the output route, while improving the efficiency of the use of the buffers. The network configuration and the traffic control process are presented. In the traffic analysis, the poling model is defined, where the number of cells to be taken out from the individual buffer is adjusted according to the number of waiting cells. The traffic processing performance of the switching network is analyzed using the approximate method of analysis for the cyclic multiple queues. The usefulness of the method is shown by numerical analysis and simulation.