Abstract

A two-dimensional analytical model for asymmetric multilayered gate dielectric surrounding gate MOSFET (AMGAD SGT) is presented and its effectiveness in suppressing short channel effects and hot carrier effects is examined. The expressions for potential and electric field have been obtained and the analysis is extended to obtain the threshold voltage and subthreshold slope of the device. It has been established that incorporation of asymmetric multilayered gate dielectric design leads to enhanced carrier transport efficiency besides also improving the short channel immunity and hot carrier reliability. The model is verified by comparing the analytical results with the simulated data obtained from device simulator ATLAS and a good agreement is found.

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