Abstract
We present a detailed study on a technique to realize a narrow and highly doped built-in $${n}^{+}$$n+ source pocket in an asymmetric junctionless nanowire tunnel field-effect transistor (AJN-TFET). In the proposed structure, a built-in $${n}^{+}$$n+ source pocket is created between the $${p}^{+}$$p+ source and the channel without the need for any separate implantation or epitaxial growth. This leads to band diagram modification by providing a local minimum in the conduction band which results in tunneling width reduction at the source---channel interface in on-state. This leads to an abrupt transition between on- and off-state, improved subthreshold swing (SS) (38 mV/dec), and significant on-current enhancement ($$\sim 2000$$~2000 times) at low operating voltage compared with the conventional TFET. We further study the effect of the length of the built-in $${n}^{+}$$n+ source pocket on the AJN-TFET characteristics. The proposed structure overcomes the difficulty in creating a narrow $${n}^{+}$$n+ pocket and thus renders the AJN-TFET device more amenable for the future scaling trend needed in low-power applications.
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