Assessment of 2-D Transition Metal Dichalcogenide FETs at Sub-5-nm Gate Length Scale

Abstract

2-D transition metal dichalcogenide (TMDC) FETs are promising devices for scaling beyond end of silicon CMOS nanoelectronics. By solving the quantum transport equation self-consistently with the Poisson equation, we explore the performance potential of TMDC FETs with a gate length in the sub-5-nm scale. The results show that the designs of gate spacer and underlap doping play an important role in device characteristics and performance. Both high-frequency performance potential and digital electronics performance potential are investigated. We show that the intrinsic cutoff frequency increases as the gate length scales down to 1 nm, and it is well above THz at LG = 1 nm. The gate fringing capacitance, however, could significantly lower the cutoff frequency, which is especially important at a short gate length of 1 nm. Simulation of a TMDC FET inverter shows that a small intrinsic delay, large voltage gain, and sufficiently large static noise margin can be maintained at an aggressively scaled gate length below 5 nm. 2-D TMDC FETs with a gate length down to 1 nm should have good performance potential in both radio frequency and digital electronics applications.