Abstract
An ASIC for a wide band (1 GHz) digital monobit receiver designed for processing two simultaneous signals will be described. The receiver consists of three major elements: (1) a nonlinear radio frequency (RF) front-end, (2) a signal sampler and formatting system (analog-to-digital converter (ADC) and demultiplexers), and (3) a monobit algorithm implemented as an ASIC for signal detection and frequency measurement. The receiver uses a two-bit ADC operating at 2.5 GHz whose outputs are collected and formatted by demultiplexers for presentation to the ASIC. The ASIC has two basic functions: (1) perform a fast Fourier transform (FFT) and (2) determine the number of signals and report their frequencies.
Sign-in/Register to access full text options 
Free) 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a call
