Abstract

This paper presents an application of a Swarm Intelligence (SI) algorithm for automatic sizing of analog circuits. For this purpose, a CMOS folded cascode Operational Transconductance Amplifier (OTA) is designed using Artificial Bee Colony technique (ABC). The performances, namely open-loop voltage gain (Av), the unity-gain frequency (Ft), the power-supply rejection ratio (PSRR) and the common mode rejection ratio (CMRR) are optimized. The optimal design of the OTA circuit is carried out using ABC method in MATLAB and the accuracy of performance prediction is verified by SPICE simulation (0.35-μm). A comparison results with published works are also highlighted.

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