Abstract
We have proposed an area-selective post-deposition annealing (PDA) process that involves a combination of flash lamp annealing and the use of a Si photoenergy absorber (Si-PEA) for metal/high-k gate last metal–insulator–semiconductor field-effect transistors (MISFETs) with NiSi on source/drain (S/D). The process makes it possible to suppress the increase in both the sheet resistance and junction leakage current of NiSi S/D regions. This PDA process also showed optimality for silicide gate electrode formation with silicidation of part of the Si-PEA. It was found that the flash lamp PDA with Si-PEA on nickel–silicide/HfAlOx/SiO2 gate-last MISFETs reduced electron trapping at the gate dielectric and resulted in better PBTI immunity than conventional rapid thermal PDA and flash lamp PDA without Si-PEA.
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