Area Optimization of MPRM Circuits Using Approximate Computing

Abstract

Approximate computing is a novel paradigm design of Integrated Circuits (ICs). By introducing an acceptable amount of inaccuracy, the area, power, and delay of a circuit can be significantly reduced. In this paper, an approximate logic synthesis (ALS) method target for circuit area optimization is proposed for mixed-polarity Reed-Muller (MPRM) circuits. The proposed algorithm mainly consists of the method of the error rate(ER) computing of Reed-Muller (RM) functions using disjointed products and the approach of the approximate MPRM functions searching for more compacted forms under the given error rate constraint. The experiments on benchmarks showed that our method is better than those which only use bit-wise operation without introducing any errors to the functions. And by using the proposed algorithm, the average circuits' area can be reduced by 49.71% with the average error rate of 1.73%. Furthermore, it can work fast and it is more efficient for large functions.