Area Efficient and High-Throughput Radix-4 1024-Point FFT Processor for DSP Applications

Abstract

Abstract1024-point FFT processor is implemented with two parallel paths using 65nm2 process technology. The implemented FFT processor occupies 3.6 mm2 of an area and operating at supply voltage of 0.4–1 V and 600 MHz clock frequency. Two parallel paths can be implemented with four parallel paths by taking advantage of Radix-4 FFT algorithm, which algorithm uses simple butterflies and less memory requirement. Implemented FFT processor is designed with multiple delay commutators, and feed-forward delay commutators signal can be processed one stage to another stage without any delay in processing the signal. Implemented four parallel path FFT processor requires less hardware which is 20% lesser and power consumption which reduces more than 30% when compared with two parallel paths Radix-22 FFT. Four parallel path FFT processor provides high throughput and less area requirement.KeywordsDiscrete fourier transform (DFT)Butterfly stage (BF)Sample/clockTwiddle factorMultiple delay commutators (MDCs)CounterRead and write circuit (R/W)