Architectural Impacts of RFiop: RF to Address I/O Pad and Memory Controller Scalability

Abstract

Despite power boundaries, Moore’s law is still present via scaling the number of cores, which keeps adding demands for more memory bandwidth (MBW) requested by these cores. To obtain higher MBW levels, it is fundamental to address memory controller (MC) scalability. However, MC scalability growth is limited by I/O pin counts scaling. To underline MC and pin scaling, a radio frequency( RF ) I / O pad-scalable p ackage-based (RFiop) memory organization is further investigated. In RFiop, a RF pad (RFpad) is defined as a quilt-packaging (QP) coplanar waveguide employed at RF ranges. An RFpad connects a rank to an RFMC which is formed by coupling MCs to RF transmitter/receivers. By using QP package to explore the architectural benefits of laying out ranks, RFiop replaces the traditional memory path with an RF-based one, while exploring the scalability of RFpads/RFMCs via RF signaling. When evaluating RFiop, our findings show that MBW/performance are enhanced by around $4.3\times $ which can be viewed as a diminution in transaction queue occupancy/latency as well as using a reduced and scalable 4–8 RFpads per RFMC. RFiop architectural area benefits allow MBW/performance improvements of around $3.2\times $ , while reducing interconnection energy up to 78%.