Abstract

An approximate analytical channel potential model of polycrystalline silicon thin film transistors operated in the strong inversion region under the high gate and low drain biases is proposed. Thus, the linear relationship between the channel potential and the drain voltage is derived in the strong inversion region under the above bias condition when the polysilicon layer is ultrathin. This model agrees with the two-dimensional-device simulation results under different gate voltages, different drain voltages and different channel lengths. By comparing the relative errors between the model and the simulation results, it presents that this model is more suitable under the higher gate voltage Vg or the lower drain voltage Vd, regardless of the channel length. And this approximate analytical model is helpful in solving the two- dimensional-device problem by one-dimensional Poisson's equation since the drain bias is taken into account in the channel potential.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.