Applying SMART-Based Power Gating Approach in NoC System

Abstract

SMART is a low-latency solution that transmits nonconflicting flits to remote routers, enabling traversal of multi-hop paths within a single cycle. It reduces packet latency but ignores high power consumption in idle components. Additionally, SMART’s low latency is highly dependent on [Formula: see text], which represents the maximum number of hops traversed within a cycle. Therefore, this paper presents SMART-PG, a power gating method based on SMART that reduces network power consumption by shutting down idle components such as router buffers under low-load conditions. We also extend the router architecture to enable the continuous establishment of single-cycle multi-hop bypass paths. Compared to SMART routers, our method eliminates packet buffering even when a packet reaches the last router of a single-cycle multi-hop path, reducing packet latency and sensitivity to [Formula: see text]. Finally, we propose a routing algorithm that enables efficient packet transmission in one-dimensional and two-dimensional networks even when routers are powered off. Experimental results show that our method reduces packet latency and static power consumption by an average of 7.5% and 46.4%, respectively, compared to the baseline router. Compared to SMART routers, our method demonstrates significant superiority in terms of packet latency and the impact of multi-hop length on packet latency.