Abstract

The advent of High-Tc materials has generated excitement for developing faster and more reliable superconducting computer systems. The new materials allow for the use of relatively inexpensive cryo-coolers, allowing portability and furthering interest in space-based on-board processing. Presently available YBCO junctions are, however, naturally damped SNS devices which do not have the hysteresis that most traditional superconducting circuits rely upon. A simple alternative to these architecture is the SAIL architecture we have developed at TRW 1). These are composed of a Series Array of dc SQUIDs (Interferometer Logic), and use non-hysteretic devices. It is much like CMOS semiconductor designs, including the voltage bias, in contrast to current bias more typical of superconducting circuits. Further, it relies on only a few SQUIDs to implement all of the binary logic functions, including a very natural invertor, without recourse to dual-rail outputs. Since the logical function of a gate is determined by the final wiring layer, gate array applications are a natural use of this architecture. In 1991 we published a demonstration of low speed operation using then available YBa 2 Cu 3 O 7 dc SQUIDs 2). These tests showed mat the devices will work using supplied voltage rails and do not latch at intermediate voltages as early models had predicted. Our current efforts are geared toward placing much improved devices 3),4) in this architecture and testing at high (2 GHz and higher) speed at higher temperatures (above 65 K) Our modelling indicates that generally speed will be limited by the inductive input coils, a problem not faced by RSFQ 5) Iogic fçr example. The larger SAIL operating margins, it's simplicity of design, and more generous production latitude will allow early use in many important application. SAIL modelling and experimental results will be compared to other designs, and RSFQ in particular, with respect to speed, performance, and margins.

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