Abstract
The use of a Pt/a-Si:H gate on GaAs MESFET structures is shown to produce a rectifying gate with lower currents in forward bias, this being applicable to increasing noise margins in direct coupled FET logic schemes. FETs show good DC transconductance, low hysteresis in the currentvoltage (I/V) characteristics, and the absence of severe drift. This confirms that the approach is not hampered by slow surface states.
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