Abstract

In this paper, we present a novel methodology for vector generation that maximizes the metric of datapath coverage for a given combinational logic circuit. The proposed methodology is based on Mixed Integer Linear Programming (MILP). The search of input vectors based on the datapath coverage metric is a satisfiability (SAT) problem. In order to obtain maximum coverage vectors, we use a novel model for the Boolean logic gates to translate the original SAT problem into an MILP optimization problem. Next, the new problem is solved following the MILP optimization environment and an exhaustive search strategy. We compare our proposed methodology with the exhaustive search algorithm. Experimental results and performance comparisons based on the large set of MCNC'91 suite of benchmark circuits are presented. They show significant speedups of MILP methodology against the exhaustive search algorithm for the complex circuits.

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