Abstract

Digital pulse delay device is one of the key techniques of range-gated imaging lidar. At present, Digital method and analog method are the two main implementations of pulse delay device. Digital method is mainly achieved by counter or FIFO memory. With the development of Complex Programmable Logic Device (CPLD), the digital delay device can be achieved with a single chip of CPLD. With this method, the digital delay device enjoys the advantages of high integration, high reliability and strong ability of anti-electromagnetic interference. However, since the maximum clock frequency of CPLD is limited, the improvement of temporal resolution is restricted. Analog method is mainly realized by the delay-line, which is one of the dedicated integrated circuit. Using this method, a higher time resolution can be arrived. In this paper, the timing characteristics of the delay signal are analyzed. Three design options are presented and the advantages and deficiencies are discussed. Based on the theoretical analysis and numerical simulation, the digital delay device combined with the delay chip AD9501 and Field Programmable Gate Array (FPGA) is chosen because of its large dynamic range and high accuracy. Besides, the output pulse width can be adjusted conveniently. The digital delay device is simulated and the result shows that the delay control for range-gated imaging lidar is feasible.

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