Abstract
A hybrid optimization scheme is presented that combines Tabu-search, communication volume based core swapping and Discrete Particle Swarm Optimization (DPSO) for NoC (Network-on-Chip) mapping. The main goal of the optimization is to map an application core-graph such that the overall communication latency of the NoC is minimal. It is assumed that the target NoC has a 2D-mesh topology. DPSO is used as the main optimization technique where each swarm particle move is influenced by the global and local best, previous visited search space locations, and a deterministic method to reduce communication volume of existing mapping. We employ a Tabu-list to discourage swarm particles to re-visit the explored search space and propose an alternative direction towards the intended movement direction. The methodology is tested for some multimedia applications as well as randomly generated large network of synthetic cores-graphs. For larger applications, our hybrid scheme generates high quality NoC mapping solutions as compared to DPSO based existing techniques.
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